A novel trench-isolated buried N+FAMOS Transistor suitable for high-density EPROM's

This paper describes an innovative use of trench isolation to achieve high programmability and improved isolation in a high-density electrically programmable read-only memory (EPROM) cell. This cell, with a 13.5-µm
²
area at 1.5-µm design rules, was fabricated by using a novel cross-point structure with buried N+ (BN+) bit lines as source and drain of the floating-gate avalanche injection MOS (FAMOS) transistor. Programming efficiency and bit-line isolation were enhanced by a novel positioning of the trench isolation between bit-lines and between the double-polysilicon FAMOS transistors. Trench isolation should permit scaling of the bit-line spacing to below 1 µm.