High-speed polysilicon emitter—base bipolar transistor

High-speed polysilicon emitter and base electrode Si n-p-n bipolar devices were fabricated showing performances of 55-ps ECL gate delay (FI = FO = 1) and cutoff frequency of 15.6 GHz (at V
CE
= 3 V, LV
CEO
= 6.8 V). These devices were built on an oxide-isolated substrate produced by planarizing oxide which is deposited after device Si island etching. The final emitter width is 0.5 µm, and a 1.3-µm-thick arsenic-doped LPCVD epitaxial layer of 0.25 Ω.cm is utilized. Emitter-base (E-B) junctions formed by direct implantations of arsenic and boron ions into a substrate were compared with junctions induced by diffusing dopants from implanted polysilicon. In the case of diffused junctions, an emitter junction depth of less than 500 Å along with a 1000-Å base width can be obtained.