Comments on "Source-and-drain series resistance of LDD MOSFET's"

Sheu et al. [1] recently reported a method to model the source-and-drain series resistance of LDD MOSFET's by assuming the n- region to be gate controlled. We argue that the degree of gate fringing effects depend on structure and that for our "outside" LDD transistors with 1E14/cm
²
for the n- dose, this is not the case. In addition, we point out that the their model has practical limitations as it is applicable for the MOSFET linear region only. We also claim that since their model is based on a number of process-dependent parameters, on a run to run basis it will not be generally applicable.