Static random access memory using high electron mobility transistors

A 4-bit fully decoded static random access memory (RAM) has been designed and fabricated using high electron mobility transistors (HEMT's) with a direct-coupled FET logic approach. The circuit incorporates approximately 50 logic gates. A fully operating memory circuit was demonstrated with an access time of 1.1 ns and a minimum WRITE-enable pulse of less than 2-ns duration at room temperature. This memory consumes a total power of 14.89 mW and 87.8 µW per memory cell.