Design and performance of a low-noise charge-detection amplifier for VPCCD devices

This paper describes the design and performance of a low-noise amplifier used with virtual phase charge-coupled devices. Topology of the detection node, details of the operation, and computer simulations for critical device parameters are presented. Attention is focused on the noise performance and charge-detection sensitivity. A simple noise model is developed and used to derive an expression for the noise equivalent number of electrons
N_ee
which is then used to optimize the amplifier design. Finally, predictions obtained from the model are compared with measurements, and conclusions are drawn for the maximum attainable performance. In addition to the thermally generated noise, usually measured in buried-channel MOS transistors, an excess noise is sometimes seen at moderate to large drain biases. This phenomenon is also observed in this amplifier. However, an explanation for the effect, confirmed by measurement, is presented and a method to avoid degradation of the amplifier performance is found.