Hot carrier instability in submicron MoSi2gate MOS/SOS devices

Hot carrier instability in submicron MoSi
2
gate N and P channel MOS/SOS is investigated in comparison with that of bulk silicon MOS FETs. One micron MoSi
2
gate NMOS/SOS is significantly endurable to the hot electron instability in comparison with n
⁺
-poly silicon gate NMOS/SOS and with MoSi
2
gate and n
⁺
-poly silicon gate NMOS/bulk with the same geometry. SUPREM-II simulation of MoSi
2
gate NMOS indicates that an n-type layer is formed in the surface channel region, which makes the device to be buried channel type. On the other hand, n
⁺
-poly silicon gate NMOS FET operates as a surface inversion type device. The gate current of the buried channel type devices is smaller than of the surface inversion type devices, because the channel of the buried channel device is away from the Si-SiO
2
interface, which should effectively prevent hot electron injection into the gate. Thus, V
d
^max
strongly depends on the depth of the conductive channel.