A virtual self-aligned process for n-channel InP IGFET's (or MISFET's)

A virtual self-aligned process for fabricating IGFET's (or MISFET's) has been developed. Devices fabricated on semiinsulating InP substrates using this process show: (i) square-law characteristics, (ii) an inverse-relationship between transconductance and gate length, and (iii) high surface channel electron mobilities on the order of 1000 cm
²
/v.sec.