"Electrical microscopy" of test parameter inhomogeneities resulting from microdefects in processed silicon wafers

Experimental results are presented on reverse current (I
_R
) inhomogeneities in n+-p diode arrays fabricated on wafers selected from dislocation-free Czochralski-grown silicon crystals. The crystals are boron doped with a resistivity of 10 Ω· cm and a (100) growth orientation. I
_R
test results are presented as a test map using a computerized test system with a data graphics capability. The I
_R
test "micrographs" reveal a direct correlation with the microdefect distribution in the original unprocessed wafers as observed with optical microscopy and chemical decoration etch methods. The microdefect distributions in the crystal result from growth interface instabilities formed during the crystal-growth process. It is observed that the microdefect distribution is dominant in all I
_R
test maps and thus provides a graphic link between charge carrier transp01rt in the depletion region of p-n diodes and the microdefects formed during crystal growth which generate the excess I
_R
current. This experimental method can be used to establish correlations between electrical test parameter nonuniformities in semiconductor devices which result from inhomogeneities in charge carrier transport and diffusion in the material, and structural inhomogeneities which are formed during crystal growth and subsequent wafer processing.