A two-dimensional analysis for MOSFET's fabricated on buried SiO2layer

An accurate numerical analysis for predicting characteristics of MOSFET's Fabricated on an epitaxial Si layer on top of a buried SiO
2
layer formed by oxygen ion implantation is presented. Basic equations, that is, the current continuity equation for minority carriers, Poisson's equation, and the equation for the majority-carrier concentration including carrier multiplication due to impact ionization, are iteratively calculated for obtaining a self-consistent solution. Good agreement between theoretical and experimental results was obtained over a wide range of device parameters and terminal biases. Threshold dependence upon Si/buried SiO
2
interface charge as well as Si film thickness is shown. As the Si film and buried SiO
2
thicknesses are reduced, the threshold voltage shift with channel shortening becomes smaller. Finally, theoretical analysis shows that the short-channel effect in MOSFET fabricated on an epitaxial layer with an underlining buried SiO
2
layer is smaller than those in bulk Si MOSFET and MOSFET/SOS.