Low-level avalanche multiplication in IGFET's

Results are presented for both theoretical and experimental analyses of low-level avalanche multiplication in an insulated gate field-effect transistor (IGFET). The theoretical model is derived from the ionization integral using a linear field approximation for the electric field at the drain. Experimental multiplication factors are determined by measuring channel and substrate currents. The model is shown to lead to reasonable agreement with data in the range of multiplication factors defined by (M
n
- 1) less than unity.