Multi-step A/D converters with time-multiplexed comparators

A novel design technique for multistep A/D (analog-to-digital) converters is presented. The technique involves time-multiplexing of the comparators using multiphase nonoverlapping clocks. The basic idea of the design scheme is to compare the sampled analog voltage source at each clock phase. The technique also allows performance tradeoffs between the speed of conversion and the number of comparators used in the system. Some examples illustrating the concept are presented.<
>