High-frequency limitations of abrupt-junction FET's

This paper represents analytical results concerning the high-frequency limitations of FET's of junction-gate or Schottky-gate constructions. The intrinsic
y
parameters are calculated in closed form using the analog RC transmission line method. The bias dependence of various characteristic factors in the y parameters expressions are presented graphically. Equivalent networks including both the intrinsic and extrinsic resistance-capacitance elements are presented and used to calculate the power-gain and frequency limitations of FET's.