A three mask bipolar integrated circuit structure

A new bipolar integrated circuit structure has been fabricated that compares favorably to the MOS structure in terms of fabrication simplicity and performance. The new structure is basically a modified isolated lateral transistor and requires only three photolithographic masking operations up to and including first level of metalization. The fabrication of the structure is as follows: a shallow nonselective p-type base region is diffused into a lightly doped p-type substrate; n
⁺
emitter and collector regions are then simultaneously and selectively diffused into and through the p-type base region thus forming a lateral n-p-n transistor. The second and third masks define the contact holes and the metalization pattern, respectively. Lateral isolation of the structure is obtained by encircling the emitter and base regions with the collector region. Vertical isolation is achieved by the large collector-depletion region that extends beneath the emitter and base regions. Since the substrate is lightly doped a low collector voltage will adequately isolate the emitter and base regions from adjacent devices. The new technology permits the fabrication of transistors, resistors, and crossunders. Transistors with 2-to 3-µm spacings occupy 500 µm
²
of silicon area and have the following characteristics:
\beta = 35
, peak
f_{t} = 0.1
GHz at 0.5 mA, BV(SUSTAIN) = 3 to 5 V,
t_{r} = 20
ns,
t_{f} = 120
ns,
t_{s} = 20
ns. Resistors with values as high as 40 kΩ have been fabricated within 600 µm
²
. Active nonlinear loads with effective resistance up to 200 kΩ have been fabricated. TTL gates have been made with power-delay products of 3.6 pJ, and propagation delays of 34 ns.