A new correlated double sampling (CDS) technique for low voltage design environment in advanced CMOS technology

In this paper, a new Correlated Double Sampling (CDS) Technique based on Fixed Voltage Difference (FVD) is introduced. Compared with the traditional CDS technique with voltage sampling for A/D conversion, this method has the advantage of low voltage capability, which relieves the high resolution requirement of the subsequent A/D converter as a result of the limited voltage swing in advanced deep-submicron CMOS technologies. The new technique also allows the use of reference voltages to control the dynamic range of the circuit. The FVD CDS technique has been applied to the readout circuit of a low voltage CMOS Active Pixel Sensor (APS) circuits with an array size of 128×128 fabricated by a 0.25µm CMOS process from TSMC. The circuit is proven to be functional at extremely low V
DD
with added dynamic range.