A 0.8 µm SOI CMOS on-board data handling bus modem for satellite applications

This paper presents a 500 kBit/s modem for space applications, designed for interfacing the satellite equipment with the On-Board Data Handling (OBDH) bus system. The 28 mm
²
chip, fabricated in a 0.8 µm SOI radiation-hard CMOS process, achieves a bit-error rate as low as 10
^-14
with 120 mV
RMS
of noise consuming 64 mW from a 5 V power supply.