A reconfigurable crossbar switch with adaptive bandwidth control for networks-on-chip

We propose a new crossbar switch structure with adaptive bandwidth control. In a complex SoC design, the proposed crossbar switch efficiently incorporates various IPs with different bandwidth requirements. Simulation under various traffic scenarios shows that the throughput of the proposed crossbar switch is as high as that of a conventional switch operating at twice the speed. The proposed crossbar switch shows maximum 27% improvement in throughput and maximum 41% improvement in latency compared to the conventional one. The proposed crossbar switch is implemented using Verilog HDL, synthesized with an 0.18 /spl mu/m process library, and verified on FPGAs. The area and power overhead of the proposed crossbar switch is 21% and 15%, respectively, when compared to the conventional crossbar switch.