Low-noise optimization of JFET input stage for capacitive current sources

The best input stage for amplifying a current signal from capacitive sources up to frequencies of the order of tens of MHz is a common-source-connected-junction FET [1]. The optimization of this stage to the minimum noise level is described; it is based on coupling the signal source to the amplifier by means of an optimized matching coil [2], and paralleling several FET's at the input stage.