Architecture and applications of a 12-bit CMOS microprocessor

In this paper, we describe the design, interface, and architectural features of a 12-bit single-chip microprocessor, the IM6100, implemented with a silicon gate complementary MOS (SiG CMOS) process. The features of CMOS circuits for operation in difficult noise, temperature, and power environments are noted. The microprocessor recognizes the instruction set of the PDP-8/E minicomputer. It is also programmed I/O interface compatible with the PDP-8/E. A unique feature of the IM6100 is the provision for a "transparent" operator console. An all-CMOS processor system with 256 × 12 RAM, 1K × 12 ROM, and a programmable asynchronous serial interface port can be built with seven LSI devices. The system dissipates 60 mW at 5 V.