Modeling-based design optimization of wafer-level and chip-scale packaging for RF-MEMS devices

A wafer-level chip-scale package for RF-MEMS devices - specifically RF-MEMS switches - has been developed that meets the criteria needed for encapsulation of these devices. The RF-MEMS devices within the package are of a coplanar waveguide (CPW) configuration and were designed for operation from 1 to 10 GHz. High resistivity silicon (HRS) and low temperature co-fired ceramic (LTCC) were chosen due to their ease of processing, mechanical properties, and electrical performance. Representative models of capping substrates for the RF-MEMS switches were developed to simulate and optimize the designs using Microwave Office from Applied Wave Research. Data were obtained from the models in the form of scattering or S-parameters. The results show that for substrates with thicknesses below 300 /spl mu/m, the electrical performance is acceptable for the use of HRS and LTCC as capping-substrate materials.