Creating the IC palette (ASIC design)

To facilitate the design of high performance digital ASICs, the Research Triangle Institute (RTI) is developing a library of common digital signal processing macrocells for use in a silicon compilation environment. In many types of digital ASICs (especially signal processing applications), VLSI circuits are composed of a basic set of high-level functions which are used in different configurations. Examples of these functions are adders, registers, memories, multiplexers, and multipliers. By developing a robust library of parameterized functions, significant reductions in design time and costs can be achieved. A complete list of macrocells slated for development by RTI is shown. This list is meant to complement RAM, ROM, and PLA generators already available through Mentor-Graphics.<
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