Adaptive sampling methodology for in-line defect inspection

Today's advanced semiconductor manufacturers have well over one hundred process steps and several weeks of throughput times. In order to minimize the product at risk at final test, in-line defect monitoring inspection with an adequate sampling plan are used to measure and collect defectivity levels on product wafers at key inspection steps during both process development and high-volume manufacturing phases. The sampling plan for inspection is constrained by the inspection tools available capacity whilst being driven by cost of excursions or material at risk. In this paper, key metrics such as the variance ratio, defined as the ratio between lot-to-lot variance and wafer-to-wafer variance, the excursion frequency, and the normalized mean shift are analyzed as the sampling (%lots, #wfrs/lot) is modified. The results are then used to propose a method of monitoring and controlling these key metrics to trigger a mechanism for more or less sampling (adaptive or dynamic sampling) to better utilize the inspection resources and quicker excursion detection while minimizing the yield loss to production