Preparation of thin strained Si film by low temperature Ge ion implantation and high temperature annealing

An approach combining /sup 74/Ge/sup +/ ion implantation with a high dose of 7/spl times/10/sup 16//cm/sup 2/ at 77 K with subsequent annealing at 1100/spl deg/C for 2 hours has been used to prepare thin strained Si films on Si substrates. It is demonstrated by RBS analysis that Ge ions partly enter into the Si host lattice sites, which leads to the formation of a buried SiGe alloy layer, and Ge profile broadening during annealing is availably restricted by low temperature implantation. TEM observation reveals that the formation of surface defects above the SiGe alloy layer, which occur during annealing below 800/spl deg/C, is effectively inhibited by annealing directly at a temperature as high as 1100/spl deg/C and some dislocation loops form only under the buried SiGe alloy layers. The existence of tensile stress of about 1.4/spl times/10/sup 9/ N/m/sup 2/ in the top silicon is verified by Raman measurements.