Investigation of soft error rate including multi-bit upsets in advanced SRAM using neutron irradiation test and 3D mixed-mode device simulation

We investigated the SRAM soft error rate (SER) by using neutron irradiation testing and computational modeling. Experimentally observed multibit-error patterns can be clarified by our detailed SRAM upset model derived from the 3D device-circuit mixed-mode simulation. This work describes several essential key issues for predicting SER accounting for practical SRAM circuit-layout design issues.