Numerical and experimental analysis of an InP/InGaAs tunneling emitter bipolar transistor (TEBT) for low-voltage and low-power circuit applications

An InP/InGaAs tunneling emitter bipolar transistor (TEBT) for low-voltage and low-power circuit applications are comprehensively studied and demonstrated. Based on the detailed numerical tools, the insights into carrier transport of TEBT are investigated. Due to the employment of an appropriate tunneling emitter barrier, holes are confined effectively. So, the emitter injection efficiency is remarkably enhanced. Experimentally, the studied HBT with a thin tunneling barrier structure shows a very small offset voltage of 40mV and an extremely wide collector current operation regime. The low offset voltage is effective to improve amplifier efficiency at low power supply voltages. Furthermore, the operation region is larger than 11 decades in magnitude of collector current (10-12 to 10-1 A). A current gain of 3 is obtained even the device is operated at an ultra-low collector current of 3.9/spl times/10-12A (1.56/spl times/10-7A/cm/sup 2/). This is certainly suitable for low-voltage and low-power circuit applications.