Fault diagnosis of a GHz CMOS LNA using high-speed ADC-based BIST

This paper presents a fault isolation method using the digital signatures from a LNA BIST solution. The fault localization capabilities of the functional test and data analysis methods are demonstrated by circuit level simulation. Also a discussion of the efficacy of this method is given. Results showed that only 16% of the resistive faults examined here cannot be mapped to its specification location in the LNA.