A novel pair-based (2/spl times/2) technique for fast inductance extraction of narrow on-chip interconnects

Inductance noise coupling to a net primarily depends on the mutual inductances between the net and its attackers. The mutual inductances between the attackers themselves are assumed to have less impact, and are consequently ignored in some noise estimation methodologies for post-layout extraction flows. Such simplified methodologies do not require the fully coupled inductance matrix; and it rather needs only the self-inductance of the attackers and a mutual inductance between the victim and its attackers. A new technique has been implemented to achieve an average speed up of 10/spl times/ with an accuracy loss of less than +/- 5% with respect to the full (N/spl times/N) extraction.