Dynamic-Vt, dual-power-supply SRAM cell using D2G-SOI for low-power SoC application

In this paper, new SRAM cells are proposed to lower the operable Vdd with improving the soft-error rate (SER), static-noise margin (SNM), writing margin, and cell current. The cells feature uses of a new fully-depleted (FD) SOI, called dynamic-double-gate SOI (D2G-SOI), and uses dual power supply to boost the word-line voltage and power supply while bit-line voltage is maintained low to keep power consumption low.