Noise-shaping techniques applied to switched-capacitor voltage regulators

A delta-sigma control loop for a buck-boost dc-dc converter with fractional gains is presented. This technique reduces the tones caused by the traditional pulse-frequency modulation regulation. The prototype regulator was fabricated in a 0.72-/spl mu/m CMOS process and clocked at 1 MHz. It achieved suppression of tones up to 55 dB in the 0-500-kHz range. The input voltage range was 3-5 V. The output voltage ranged from 1.8 to 4 V for load currents up to 150 mA.