An integrated power switching stage with multichip planar interconnection construction

A power-switching stage (500 V/12 A), which includes a Si CooIMOS FET/SiC diode power factor correction (PFC) power switching part and a Si MOSFET totem-pole DC/DC power switching part, has been designed and fabricated, based on a planar integration technology, so called embedded power, through building up dielectric/metallization thin-film interconnection directly on coplanar bare power chips embedded in a carrier substrate. This novel construction eliminates completely the first-level interconnection such as wire-bond and solder bump, and is with an integrated three-dimensional (3-D) form factor. Such packaging scheme is superior to reduction of electrical parasitics and to improve the thermal/thermomechanical properties of the module. The procedure adopted for the design and fabrication of this module is presented. The electrical performance including parasitic parameters and switching behavior is characterized experimentally and theoretically with simulation tools such as Maxwell Q3D and I-DEAS. Compared to the conventional wire-bond module, 10% reduction in R/sub d50/spl Omega// (0.2/spl Omega/), 75% reduction in parasitic inductance (3.5 nH) and thermal resistance R/sub /spl theta/jc/ of 0.115 /spl deg/C/W have been obtained.