Modeling of planar varactor frequency multiplier devices with blocking barriers

Models for optimization of planar frequency triplers with symmetrical C-V curves are presented. The roles and and limitations of various blocking barriers (oxide, Mott, heterojunction) are discussed. Devices with undoped drift regions (BIN) gave moderate efficiency but a broad range of power generation, whereas the devices with doped drift regions (BNN) have high efficiency in a narrower power window. In particular, an upper power limit of the BNN is caused by electron velocity saturation. Implementations in SiO/sub 2/-Si and AlAs-GaAs and means for increasing the power of BNN structures are considered.<
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