Multistep field plates for high-voltage planar p-n junctions

Multistep field plates are often used to improve the blocking capability of planar p-n junctions. The electric field at the semiconductor surface below the field plate peaks, however, at every edge of the dielectric. In order to achieve the highest possible breakdown voltage at a given number of steps in the dielectric, their heights have to be adjusted as to equalize the corresponding peak fields. For this purpose, an analytical model has been developed, which relates the peak field to the geometrical and physical parameters of the structure. From this, a systematic method has been derived for designing multistep field plates with equal peak fields at the steps. By applying this method to a planar p-n junction the blocking capability was increased from 23% without field plates to more than 89% of the bulk breakdown voltage.<
>