Reliability properties of low-voltage ferroelectric capacitors and memory arrays

We report on the reliability properties of ferroelectric capacitors and memory arrays embedded in a 130-nm CMOS logic process with 5LM Cu/FSG. Low voltage (<1.5 V) operation is enabled by the 70-nm thick MOCVD PZT ferroelectric films. Data loss resulting from high temperature bakes is primarily caused by the imprint effect, which shows /spl sim/1.5 eV time-to-fail activation energy. Excellent bit endurance properties are observed on fully packaged memory arrays, with no degradation up to 10/sup 13/ write/read polarization switching cycles. Retention measured after 10/sup 12/ switching cycles demonstrates no degradation relative to arrays with minimal cycling.