FPGA implementation of 4/spl times/4 MIMO test-bed for spatial multiplexing systems

Multiple input multiple output (MIMO) transmission techniques hold the potential of dramatically increasing the data rates and spectral efficiency of wireless communication systems. However, since multiple transmitters and receivers are required, a large number of channel emulators are also required for in-lab experiments, resulting in an increase in equipment cost. This paper describes an implementation of received signal generator for a 4/spl times/4 MIMO transmission in one FPGA chip which can be utilized as a real-time MIMO spatial multiplexing system test-bed. Our experimental results demonstrate that the CDF and channel correlations of emulated Rayleigh fading under this fading channel approach the theoretical values.