A digital power spectrum estimation method for the adaptation of high-speed equalizers

This work presents a method to estimate the power spectrum of digital signals, which is then used to generate an error signal to tune Gbps data rate equalizers for digital communications. The proposed power spectrum estimation method can be realized with standard digital circuits and has been fabricated and tested in 0.35-/spl mu/m CMOS technology for 1-Gbps data rate. Compared with the traditional bandpass filter followed by a rectifier implementation, this method has wider input signal range and is scalable to higher speed technologies beyond the gigahertz range, in addition to largely reduced power dissipation and die area. Also presented are system simulations on the bit-error rate performance and the error space analysis of the proposed method in comparison with the method of using a bandpass filter followed by a rectifier.