A novel pipelined fast Fourier transform architecture for double rate OFDM systems

A high throughput fast Fourier transform/inverse fast Fourier transform (FFT/IFFT) processor for double-rate wireless LAN, based on double-rate OFDM communication systems, is proposed. It is an efficiently pipelined radix-2 FFT architecture, which doubles the throughput with significant hardware reduction. The utilization rate of multipliers and the processing elements reach 100%. The core size is 10 mm/sup 2/ with a power consumption of 208 mW at 20 MHz for data inputs with 15-bit word length, using 0.35 /spl mu/m IP4M CMOS technology.