A direct-conversion CMOS transceiver for the 802.11a/b/g WLAN standard utilizing a Cartesian feedback transmitter

A fully integrated dual-band transceiver is implemented in 0.18-/spl mu/m CMOS and is compliant with the IEEE 802.11a/b/g standards. The direct-conversion transceiver occupies 12 mm/sup 2/ in a QFN-40 package. A fractional-N synthesizer operates at twice the channel frequency, covering continuously bands from 4.9 to 5.9 GHz, as well as the 2.4-GHz band. The 5- and 2.4-GHz receivers achieve a sensitivity level below -73 dBm in the 54-Mb/s mode and below -93 dBm in the 6-Mb/s mode, while consuming 230 mW. A fast RSSI-channel power-detection system allows to power-down signal processing in the listen mode. The 5- and 2.4-GHz transmitters implement a wideband Cartesian feedback loop for enhanced EVM performances and improved spectrum masks compliance. The transmitters deliver -2-dBm average power with an EVM of 3% in the 54-Mb/s mode while consuming 300 mW.