A 3.5GHz integer-N PLL with dual on-chip loop filters and VCO tune ports for fast low-IF/zero-IF LO switching in an 802.11 transceiver

A PLL-technique is introduced to enable fast switching of an 802.11 transceiver local oscillator (LO) between a low-and a zero intermediate frequency (LIF/ZIF). It uses dual phase/frequency detectors (PFD), charge pumps (CP) and on-chip loop filters to control two separate low-leakage VCO tune ports. Each PFD/tune port combination can be (de)activated separately, without disturbing the loop filter charge. A 50 kHz bandwidth integer-N PLL achieves a measured 7 MHz-jump with /spl plusmn/20 kHz accuracy within 60 /spl mu/s. The measured phase noise is -123 dBc/Hz at 1 MHz offset.