Reconfigurable supercomputing

Summary form only given. The synergistic advances in high-performance computing and in reconfigurable computing, based on field programmable gate arrays (FPGAs), form the basis for a new paradigm in supercomputing, namely reconfigurable supercomputing. This can be achieved through hybrid systems of microprocessors and FPGA modules that can leverage the system level concepts from high-performance computing and extend them to accommodate reconfigurations. Such systems inherently support both fine-grain and coarse-grain parallelism, and can dynamically tune their architecture to fit the applications. Many researchers have recognized this and advances are proceeding at three system levels. At the networked computing level, researchers have extended job management systems to recognize networked reconfigurable resources and exploit their power, in a grid computing fashion. Progress has been also made in programming and managing computer clusters, with reconfigurable co-processors. Finally, steps have been taken towards the development of massively parallel systems of conventional microprocessors and reconfigurable computing capabilities. Programming such systems can be quite challenging as programming FPGA devices can essentially involve hardware design. However, there have been very significant developments in compiler technologies and programming tools for some of these systems. This paper introduces the field of reconfigurable supercomputing and its advances in systems, programming, applications, and compiler technology.