The optimization of the settling process of the source follower based sampling circuit using continuous g/sub m/-model

This paper presents an analytic method for the optimization of the sampling process of the source follower sampler. The method enables the analytical definition of that aspect ratio of the source follower transistor that minimizes the settling time constant of the circuit. Thereby both the power consumption of the circuit and the distortion of the sampled signal can be effectively minimized. The method utilizes a continuous analytically usable g/sub m/-model that provides a smooth and accurate transition between the well-known weak inversion and strong inversion g/sub m/-models. The method can be used not only in this context but also in any optimization situation in which the time constant /spl tau/ should be minimized. The precondition is that the /spl tau/ is set by the g/sub m/, constant load capacitance and the linearly width/length dependent device capacitances of the transistor that produces the g/sub m/. The value of the method is not only in the knowledge of the optimal aspect ratio of the critical transistor but also in the fact that it enables the analytic examination of the optimized performance and thereby the usability of the circuit.