A 32-bit 64-word 9-read, 7-write ported, noise and process variation-tolerant and wide-voltage-range-operative register file using 130 nm technology

We have developed a 32-bit, 64-word 9-read, 7-write ported register file for a processor based on 130 nm process technology. This register file has several circuits for improving noise and process variation tolerance, such as self-timing control circuits and crosstalk reduction circuits. Body bias voltage control can also be employed. These circuits and techniques confer tolerance to noise and process variation, allowing the register file to be operated over a wide voltage range from 0.6 V to 2.2 V.