A 16Mb MRAM featuring bootstrapped write drivers

A 16Mb Magnetic Random Access Memory (MRAM) is demonstrated in 0.18 /spl mu/m three-Cu-level CMOS with a three-level MRAM process adder. The chip, the highest density MRAM reported to date, utilizes a 1.42 /spl mu/m/sup 2/ 1-Transistor 1-Magnetic Tunnel Junction (1T1MTJ) cell, measures 79mm/sup 2/ and features a /spl times/16 asynchronous SRAM-like interface. The paper describes the cell, architecture, and circuit techniques unique to multi-Mb MRAM design, including a novel bootstrapped write driver circuit. Hardware results are presented.