A COFDM baseband processor with robust synchronization for high-speed WLAN applications

In this paper, a high-performance and low-cost COFDM baseband processor is presented. With algorithm exploration in channel estimation and phase error tracking, synchronization becomes more robust to enhance system performance. And better design SNR (1.35/spl sim/7.16dB) can be achieved compared to current solutions. Moreover through architectural exploration, the proposed baseband processor designed in 0.18um CMOS process contains only 370K logic gates and 3.3Kbyte memory. Measurement results show that better hardware efficiency and performance enhancement is achieved for high-speed WLAN applications.