Three-dimensional circuit integration based on self-synchronized RF-interconnect using capacitive coupling

A self-synchronized RF-interconnect (SSRFI), based on capacitive coupling and peak signal detection, is presented. In this SSRFI, small coupling capacitor (60fF) is used to interconnect vertical active layers in 3-Dimensional IC. The demonstrated SSRFI system, including both transmitter and receiver, has been designed, fabricated and verified in UMC 0.18 /spl mu/m CMOS with a PRBS data rate of 3Gbit/s, a BER of 1.2/spl times/10/sup -10/ and a rms jitter of 1.28ps. The core circuit burns 4mW from a 1.8V supply and occupies 0.02mm/sup 2/ chip area.