Design of digital filters for low power applications by reducing the Hamming distance of the filter coefficients using mean field annealing algorithm

In hardware applications, digital filters can be realized by an integrated circuit design or can be implemented by coding of digital signal processors. They require continuous arithmetic calculations and dissipate high power and occupy a large number of hardware resources. Therefore, the design of digital filters considering hardware requirements is important for some hardware critical applications, but there is no clear method for it. Mean field annealing (MFA) is an efficient and deterministic method which can be applied to filter design algorithms. It is computationally less complex when compared to other methods, such as simulated annealing and genetic algorithms, as they are also efficient in such optimization processes where the search space is broad. This work tries to minimize the Hamming distance between successive filter coefficients. The power dissipation of a DSP is reduced when the Hamming distance is minimized, since it reduces the switching activity of the processor. The results show that the Hamming distance between the filter coefficients is reduced by about 60-70% when the mean field annealing method is employed. The next step is to simulate the power dissipation in a specific DSP architecture for the verification of the power minimization.