An experimental 256 Mb non-volatile DRAM with cell plate boosted programming technique

A 256 Mb NVDRAM is fabricated with a modified 0.115 /spl mu/m DRAM process. The cell transistor has a scaled polysilicon-oxide-nitride-oxide-silicon (SONOS) structure that traps electrons or holes at a relatively low voltage stress. NVDRAM utilizes DRAM storage node boost from the cell plate for programming to ensure more reliable operation.