Modelling of the impact of the current source output impedance on the SFDR of current-steering CMOS D/A converters

A behaviour-level model of a thermometric DAC with acceptable complexity and sufficient accuracy is presented in this paper. The impact of the current sources' internal poles on the SFDR is described in the model. With this model, the sensitivity of the SFDR to some unideal factors such as the parasitic capacitors in the internal point, and the variation of the internal points' voltages, can be observed directly. Furthermore, this model can be used for the verification of the possible solutions for the output impedance problem, and is therefore necessary for future work.