A CAD tool for circuit extraction from VLSI layout cells

The authors present an approach to converting and displaying a VLSI layout definition file, such as one produced by the MAGIC layout editing system, into a circuit diagram. The ideas presented have been incorporated into a software tool written in C language for the Microvax GPX/II workstation; the routines in the graphic kernel system are used for the graphics component of the software. An example of a cell layout developed using MAGIC is shown along with the MAGIC layout definition file relative to this. It is also demonstrated that the circuit diagram developed by such a CAD (computer-aided design) tool can be useful in verification of layout. The terminal interconnectivity information generated from the layout definition file can also be used directly for circuit simulation.<
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