Teaching asynchronous design in digital integrated circuits

To introduce the basis of asynchronous digital circuit design in an electrical engineering curriculum, Null Convention Logic is presented as an innovative asynchronous paradigm. The design flow from concept to circuit implementation is discussed. First, two completeness criteria are required for speed independency: symbolic completeness of expression and completeness of input. Second, threshold gates with hysteresis are primary components, which are used to build logic gates, full adder, and registers. As an example, a 4 /spl times/ 4 multiplier is constructed based on these threshold gates. Finally, an example of very-high-speed integration circuit hardware description language (VHDL) simulation is given to help students practice and understand the asynchronous design methodology.