Optical leak detection for wafer level hermeticity testing

Cost reduction in optoelectronic and MEMS packaging is a key issue already today and will become even more important in the future. We developed a novel hermetic packaging technology and an optical leak detector for wafer level assembly and testing, respectively. Silicon caps (HyCap/spl reg/) for localized hermetic sealing are manufactured using standard MEMS technology. Sensitive optoelectronic or MEMS devices are hermetically capped and tested on wafer level before dicing. This paper focuses on the optical leak detection and the hermecity test procedure for MEMS devices and optoelectronic subassemblies on wafer level. Testing of hermeticity for enclosed volumes of smaller than 0.01cc is a challenge a existing test procedures cannot be readily applied. To ensure maximum reliability of the package the whole range of potential leakage must be tested. We developed an optical leak test on wafer-level for low cost hermeticity testing which covers the full range from gross to very fine leak 10/sup -9/ atm cc/s. The test set-up is based on /spl mu/Scan/spl reg/ profilometer with implemented pressure chamber and control.