Considerations for using low dielectric constant material as re-passivation layer on 300mm wafer bump process and manufacturing benefits of flip chip package

Major improvements over the last four years have removed and reduced many of these barriers with the transition from 150mm, 200mm to 300mm process wafers; wafer bumping is growing in importance with the increasing use of flip chip package; the challenge to increase yields becomes greater as each wafer value rises dramatically. The 300mm processing will increase emphasis on maximizing yields and minimizing scrap costs. Polyimide film has many outstanding properties, such as low dielectric constant, a high thermal resistance, and high chemical resistance, so it was used as a dielectric or passivation layer in IC device. Recently lithographic technique with the advantage of patternability leads the traditionally nonphoto PI promoting into photo-sensitive polyimide (PSPI). This paper describes using photo-sensitive polyimide on 300mm wafer printing bump process and shows the results that spin-coating process, definition of curing degree and optical property of polyimide. The solder bump surface and bump shear are good due to properties of photo-sensitive polyimide, the polyimide surface is free from any damage because of good thermal ability and chemical resistance. Flip chip used in laminate package like PBGA and CSP BGA to replace wire bonding as interconnection has become major trend in the assembly industry. But unlike well-known failure mode of wire bonding package, flip chip package with external solder ball as electrical interconnection present an extremely different failure mode with wire-bonding package from a point of view in process and material. In this study, one 16mm/spl times/16mm 3000 I/O SnPb wafer bumping using screen-printing process was explored including the effects of reflow times, high temperature storage life (HTSL) and temperature cycle test (TCT) on bump shear strength. Furthermore, the qualified wafer bumping is assembled by flip chip assembly with specific organic build-up substrate, then is subject to precondition and temperature cycle test to observe the effect on SnPb bump protection and solder joint life. Various failure modes in the flip chip package like solder and UBM and so on, will be scrutinized with SEM. And finally, best material combination will be addressed to make the flip chip package success.